(Symbol vec_examp1);
($Id: vec_examp1,v 1.1 2013/11/21 06:57:12 stevew Exp $);
(PHYSICAL);
(RESOLUTION 1000);
9 vec_examp1;
DS 0 1 1;
DF;
E
(ELECTRICAL);
(RESOLUTION 1000);
9 vec_examp1;
DS 0 1 1;
(SymbolCall res);
5 10 2 1 -10000 0 R0[7]-;
5 10 1 0 -10000 10000 R0[7]+;
5 15 -11000 9000 0 -1 "<v>/<value>O";
5 8 7 0;
5 2 100;
5 11 R 0;
1 Bound -11250 0 -9000 10000;
9 res;
C 0 T -10000 10000;
(SymbolCall vsrc);
5 10 0 1 -19000 -5000 V0_1;
5 10 1 0 -19000 5000 V0_0;
5 15 -19000 1000 0 -1;
5 2 1;
5 11 V 0;
5 5 nophys;
1 Bound -21000 -5000 -17000 5000;
9 vsrc;
C 0 T -21000 -5000;
(SymbolCall gnde);
5 10 0 0 -19000 -5000;
1 Bound -20250 -6500 -18000 -5000;
9 gnde;
C 0 T -20000 -6000;
(SymbolCall gnde);
5 10 0 0 -3000 -5000;
1 Bound -4250 -6500 -2000 -5000;
9 gnde;
C 0 T -4000 -6000;
L SCED;
5 16 -19000 10000 9;
94 <<a,d[0:6]>> -16000 10000 0 5237 1560;
5 9 0 7 a,d<0:6>;
W2 0 -19000 10000 -10000 10000;
5 10 1;
W2 0 -19000 10000 -19000 5000;
5 16 -19000 10000 10;
94 <<a>> -21000 6000 0 1152 1792;
5 16 -10000 0 9;
94 <<d[0:7]>> -8000 0 0 4480 1792;
5 9 0 7;
W2 0 -10000 0 -3000 0;
5 9 7 7;
W2 0 -3000 0 -3000 -5000;
5 16 -3000 0 9;
94 <<<7>>> -2000 -4000 0 2688 1792;
L ETC1;
94 <<Example series-resistor circuit using new features>> -12000 16000 160 47616 1792;
L ETC2;
94 <<bundle wire>> -2000 13000 160 10368 1792;
W2 0 -13000 12000 -8000 13000;
94 <<scalar "tap" wire>> -32000 11000 160 15872 1792;
W2 0 -28000 10000 -20000 8000;
94 <<vectored resistor>> 4000 6000 160 16768 1792;
W2 0 -8000 5000 -5000 6000;
94 <<vector wire>> 2000 3000 160 10752 1792;
W2 0 -6000 2000 -4000 3000;
94 <<scalar "tap" wire>> 6000 0 160 15872 1792;
W2 0 0 -1000 -2000 -2000;
L NAME;
5 16 R 0 11;
94 <<R0[7:0]>> -11500 9250 320 3225 1000;
5 16 V 0 11;
94 <<V0>> -21250 4250 320 1275 1000;
L VALU;
5 16 R 0 2;
94 <<100>> -8750 10250 33024 1650 1000;
5 16 V 0 2;
94 <<1>> -16750 5250 33024 450 1000;
DF;
E
* Generated by Xic from cell aa
R0[0] 8 0 100
R0[1] 7 8 100
R0[2] 6 7 100
R0[3] 5 6 100
R0[4] 4 5 100
R0[5] 3 4 100
R0[6] 2 3 100
R0[7] a 2 100
V0 a 0 1
